I am using a connector in a design and I want to hide any silkscreen associated with the part. I have tried hiding all the silkscreen markings, but the outline is still showing.

How can I accomplish this?

I solved it. I needed to adjust the spoke width on the Connectivity tab of the copper pour.

I'm working on a design that uses a chip with a 0.4mm pitch. The GND connections from the chip to the GND copper are too wide. What parameter would I adjust to narrow these connections down? Is it possible to narrow for just a single pour connection?

When naming a port as -12V or +12V I am getting the following warning. The port name gets changed okay, but I'm wondering what is happening behind the scenes.

Thanks, Alex. The worked perfectly.

If I want to show an image on a board using the surface finish, is that simply a matter of placing the image on the top paste layer?

Alex wrote: 20 Dec 2023, 07:03 You can open "Route -> Route Setup", go to "Traces and Vias" tab and edit "Copper to Board Outline" option.

Thanks! That worked perfectly.

Do you want the copper to go to the edge the board outline, or to the opening of one of the interior circular and/or oval shapes?

Either case can be problematic. Are you going to fab these PCBs yourself or use a commercial vendor?
If a commercial vendor you need to validate that they can do what ...

I'm design a PCB panel which has board cutouts for jacks and pots. Both sides have a copper pour. How do I get the copper to go right to the edge of the cutout? There is some clearance parameter that is preventing this, but I can't determine which one is prevent the copper to go right to the edge of ...

Well, it would be nice if Diptrace retained the net names for the split ends.