NOT A "BUG", BUT WOULD LIKE SOME INSIGHT - BEHIND THE SCENES

Report bugs here
Post Reply
Message
Author
mtripoli
Expert
Posts: 141
Joined: 06 May 2014, 04:56

NOT A "BUG", BUT WOULD LIKE SOME INSIGHT - BEHIND THE SCENES

#1 Post by mtripoli » 07 Jan 2019, 10:36

Hi,

As I've been using Diptrace (which, let me say right now, I think DIPTRACE is progressively getting better and as soon as I can afford to update to the $1000 version I will) I've been noticing a few "behind the scenes" things that I would like some explanation of so that mistakes are not made.

If one has multiple schematics open at the same time, there seems to be some "behind the scenes" communications going on. For instance, if one has the BOM generator open and change what is included in the BOM for THAT DESIGN, and then one switches to a different open schematic, the changes to the BOM generator show up in a different, open schematic. This means there is some "GLOBAL" setting going on; as if there is a database running behind the software in which these become global changes. This is incredibly limiting; changes to one design should not be reflected in another design. If this is going to be the case, it should be documented somewhere, in the manual for instance, that spells this out; it should not be a surprise. There are of course times in which one wants to make changes to one schematic, perhaps different fields in different BOM's. This should change in that design only; not globally applied to all schematics.

This same thing happens when one is generating GERBER files. If one has two PCB board files open at the same time (I've had as many as 10 open PCB's at one time) and one makes changes to the GERBER file names, these get applied to all the PCB GERBER file generator. There are times in which I want to make file names specific to a board design; these shouldn't be globally applied to all PCB files. Again, this can be quite s surprise when one goes to generate GERBERS for a design and find that board layers have been renamed from a different design.

Would someone please offer an explanation as to what's going on "behind the scenes" so that one can prepare ahead of time, and know what is "connected"; perhaps if there some place to turn off this interconnectedness. In my estimation, I think each open schematic should run in it's own memory space and have no interaction with other designs.

Thanks.

Mike Tripoli

Post Reply