I've posted an investigation into the difficulties I've had with v scored panelised boards being processed by JLCPCB.
See viewtopic.php?p=33618#p33604
In short the Gerber x2 zip file contains a non standard file name for the v scoring, and it appears that this v score layer should also contain the board outline.
Panelised Board does not contain Outline
Panelised Board does not contain Outline
Ardent hobbyist
Re: Panelised Board does not contain Outline
I then tried validating the board using the Gerber Viewer at UCamCo
https://gerber-viewer.ucamco.com/
Using the standard GerberX2 zip file exported by DipTrace gave the following errors:
NB: add the NP argument to the Profile attribute removed this error.
To fix this I exported the GerberX2 file, opened the zip and made the following edits:
Open the V-Scoring.gbr file and copy the lines between %LPD*% and M02*, e.g. the v scoring lines
Then open the BoardOutline.gbr file and paste the copied lines just after the %LPD*% command
Also alter the File Attribute line to read
Finally delete the V-Scoring.gbr file from the zip.
Upload the modified zip file into the Gerber viewer and check the board layout layer. Then upload the modified zip file to JLCPCB and check it has been processed correctly The size has been corrected interpreted (before mods it was missing the edge rails)
https://gerber-viewer.ucamco.com/
Using the standard GerberX2 zip file exported by DipTrace gave the following errors:
Code: Select all
BoardOutline.gbr
Standard attribute '%TF.FileFunction,Profile' is invalid, continuing. "(at line 5)"
File type Gerber X2.
Code: Select all
V-Scoring.gbr
Standard attribute '%TF.FileFunction,V-Scoring' is invalid, continuing. "(at line 5)"
Non-standard .FileFunction attribute value V-Scoring, interpreted as extra layer "(at line 32)"
File type Gerber X2.
Open the V-Scoring.gbr file and copy the lines between %LPD*% and M02*, e.g. the v scoring lines
Code: Select all
X0Y10500000D2*
D10*
Y-1500000D1*
X3900000Y10500000D2*
Y-1500000D1*
X3600000Y10500000D2*
Y-1500000D1*
X7500000Y10500000D2*
Y-1500000D1*
X-1500000Y0D2*
X9000000D1*
X-1500000Y3100000D2*
X9000000D1*
X-1500000Y2800000D2*
X9000000D1*
X-1500000Y6200000D2*
X9000000D1*
X-1500000Y5900000D2*
X9000000D1*
X-1500000Y9000000D2*
X9000000D1*
Code: Select all
%LPD*%
X0Y10500000D2*
D10*
Y-1500000D1*
X3900000Y10500000D2*
Y-1500000D1*
X3600000Y10500000D2*
Y-1500000D1*
X7500000Y10500000D2*
Y-1500000D1*
X-1500000Y0D2*
X9000000D1*
X-1500000Y3100000D2*
X9000000D1*
X-1500000Y2800000D2*
X9000000D1*
X-1500000Y6200000D2*
X9000000D1*
X-1500000Y5900000D2*
X9000000D1*
X-1500000Y9000000D2*
X9000000D1*
X-1500000Y10500000D2*
D10*
X9000000D1*
Y-1500000D1*
X-1500000D1*
Y10500000D1*
M02*
Code: Select all
%TF.FileFunction,Profile,NP*%
Upload the modified zip file into the Gerber viewer and check the board layout layer. Then upload the modified zip file to JLCPCB and check it has been processed correctly The size has been corrected interpreted (before mods it was missing the edge rails)
Ardent hobbyist
Re: Panelised Board does not contain Outline
I've created a simple utility to fix the board - it addresses the issues above. It can be downloaded from GitHub (written in Delphi, source code included)
https://github.com/fastbike/GerberFix
https://github.com/fastbike/GerberFix
Ardent hobbyist