Check net connectivity on Example files

Making PCB Layouts, Manual routing, Auto-routing, Copper pouring, Updating from Schematic, Manufacturing Output
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KevinA
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Joined: 18 Dec 2015, 19:35

Check net connectivity on Example files

#1 Post by KevinA » 13 Oct 2023, 21:00

While testing my PC I found examples with pre-routed boards that show many errors when "Verification/Check net connectivity" is ran. The Banana_Pi.dip and arc_test.dip are the only ones that have no errors, that I have found. The arm.dip has no ground or power layer pours defines so of course shows errors, BGA_autorouter.dip and example_routed.dip show massive errors.

Tomg
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Joined: 20 Jun 2015, 18:39

Re: Check net connectivity on Example files

#2 Post by Tomg » 14 Oct 2023, 02:34

Yeppers. I see the same thing...

BGA_autorouter.dip
There is one DRC gap error that, according to the failure description, should not be flagged as a violation. I reported this a while back. Running the connectivity check reveals a ton of errors, probably due to those missing power plane pours.

example_routed.dip
There are no DRC errors. Running the connectivity check reveals a ton of errors. After updating the copper pours, the error count reduces to two disconnects; a missing trace between IC5(7) and a nearby "GND" via, and a missing trace between IC5(14) and a nearby "3V3" via. Running the autorouter or manually routing the connections will, of course, fix that.
drc1.png
drc1.png (52.35 KiB) Viewed 7481 times
Tom

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